Currently, electrical impedance tomography (EIT) is widely used in sheet resistivity measurement of silicon wafers. The reconstruction of a resistivity image by electrical impedance imaging usually uses a four-probe measurement method. However, it may cause some loss of data and result in inaccurate outcomes. To resolve this problem, in this paper, we propose an improved node-back-projection algorithm by integrating the pseudo-measurement principle. High-resolution resistivity images can therefore be obtained quickly without damaging the silicon wafer. The resistivity contour map is then formed to identify the resistivity distribution. Accordingly, the positions of defects in the silicon wafer can be determined from the measured image, making the quality of silicon-wafer-based chips more reliable. The experimental results verify that the proposed algorithm is superior in terms of precision, reliability, and speed.